The present invention relates to a semiconductor device having a high breakdown voltage transistor and a low breakdown voltage transistor in a common semiconductor substrate.
A liquid crystal panel driver LSI and a CCD driver LSI, for example, are operated at a power supply voltage of 10 V or higher, and therefore high breakdown voltage transistors having a breakdown voltage of 20 V or higher are normally required. On the other hand, low breakdown voltage transistors are used in internal control logic sections that need to be small in size and operated at high speeds. Wells where high breakdown voltage transistors are formed need to be made deeper in order to secure the well breakdown voltage. In contrast, wells where low breakdown voltage transistors are formed tend to be made shallower in order to reduce the element size and to achieve higher speeds. For this reason, high breakdown voltage transistors are formed in a chip that is different from a chip for low breakdown voltage transistors, and known to be formed as an externally mounted circuit.
An embodiment of the present invention provides a semiconductor device having a high breakdown voltage transistor and a low breakdown voltage transistor in a common substrate with different driving voltages.
An embodiment of the present invention provides a semiconductor device comprising: a semiconductor substrate of a first conductivity type; a first well of a second conductivity type formed in the semiconductor substrate; a triple well formed in the semiconductor substrate, and having a second well of a second conductivity type and a third well of the first conductivity type formed within the second well; a low breakdown-strength transistor of the first conductivity type formed at the first well; a low breakdown-strength transistor of the second conductivity type formed in the semiconductor substrate; a high breakdown-strength transistor of the first conductivity type formed at the second well of the triple well; and a high breakdown-strength transistor of the second conductivity type formed at the third well of the triple well, wherein the first well has an impurity concentration higher than an impurity concentration of the second well of the triple well.
Another embodiment of the present invention provides a semiconductor device, as described above, in which the third well of the triple well is electrically isolated from the semiconductor substrate. As a result with such an embodiment, driving voltages for the second well and the third well can be set independently of a substrate potential of the semiconductor substrate. Therefore, for example, a driving voltage for the high breakdown voltage transistor of the first conductivity type and a driving voltage for the high breakdown voltage transistor of the second conductivity type can be set on a positive side and a negative side, respectively, with respect to the substrate potential, and therefore a high breakdown voltage CMOS (complementary type MOS) transistor can be obtained. In this manner, in accordance with another embodiment of the present invention, a semiconductor device can include in its common substrate a high breakdown voltage transistor driven at a high power supply voltage of about 10 V or higher, and more particularly, about 20-60 V, and a low breakdown voltage transistor driven at a power supply voltage of, for example, about 1.8-8 V.
Another embodiment of the present invention provides a semiconductor device, such as those described above, having a ratio of the breakdown voltages of the low breakdown voltage transistor and the high breakdown voltage transistor that may be about 3 to 60.
Another embodiment of the presentation invention provides a semiconductor device, such as those described above, in which the high breakdown voltage transistor may have an offset gate structure.
Additional features and advantages of the invention will be more fully apparent from the following detailed description of example embodiments, the accompanying drawings and the associated claims.